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SCS3010e
The SCS3010e is
an integrated chip solution for the Stratum 3 or 3E Synchronous Timing Source in
SONET/SDH network elements. The device generates four synchronous clocks,
including BITS, and is fully compliant with Telcordia GR-1244-CORE, GR-253 and
ITU-T G.812/G.813.
Designed
specifically for ease of use and application integration, the SCS3010e also
provides industry-leading exceptionally low jitter performance.
 | Supports Master/Slave
operation |
| Supports freerun, locked,
and holdover modes |
| Accepts 8 reference inputs
and one cross reference from 8KHz to 77.76MHz |
| Continuous input reference
quality monitoring |
| Input reference frequencies
are automatically detected |
| Automatic or manual
selection of active reference |
| Supports hardwire pins to
select active reference. |
| Four output signals: one
selectable up to 155.52MHz, one fixed at 8KHz, one multi-frame sync fixed
at 2Khz, and 1.544Mhz or 2.048Mhz BITS output |
| Output phase is adjustable
in slave mode |
| Frequency ramp control
during reference switching |
| Hit-less reference switching |
| Phase build-out on lock,
reference hits, and reference and master/slave switching |
| 10-6 ppm holdover
accuracy |
| 12 configurable filter
bandwidths - .77 mHz to 1.6 Hz |
| Supports SPI and 8-bit
parallel bus interface |
