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SCS3020
The SCS3020 is an
integrated chip solution for timing card synchronization and clock generation in
SONET/ SDH network edge elements. The device is fully compliant with Telcordia
GR-1244-CORE, GR-253-Core stratum 4, 4E and SMC requirements, ITU-T G.812 for
Type IV, V, and VI and G.813 for SEC requirements. All phase lock and output
signal generation is digital for accurate and consistent performance.
The SCS3020
device accepts two reference inputs and generates three synchronous clocks. All
output signals are directly digitally synthesized, requiring no external or
internal VCO or analog PLLs. Device control includes bus interface for register
access.
 | Supports freerun, locked,
and holdover modes |
 | Accepts 2 reference inputs
at 8Khz, 1.544Mhz, 2.048Mhz, and 19.44Mhz |
 | Input reference frequencies
are automatically detected |
 | Supports hardwire pins to
select active reference. |
 | Three output signals: 8Khz
framing, 19.44Mhz, and one user selectable at 1,2,4 or 8 x 2.048Mhz or
1,2,4 or 8 x 1.544Mhz |
 | Individual output
enable/disable |
 | User controllable automatic
phase align capability |
 | Frequency ramp control
during reference switching |
 | Hit-less reference switching
(<5nS, <2nS typical) |
 | 10-6 ppm holdover
accuracy |
 | Configurable bandwidth
filter from .098Hz to 1.6Hz |
 | Supports SPI interface |
 | Single 3.3V supply |
SCS3020 Product Brief
SCS3020 Product Data Sheet
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